Vaidikalaya

MCQ On Addressing Modes

Q1. In the case of, Zero-address instruction method the operands are stored in _____.
  1. Registers
  2. Accumulators
  3. Push down stack
  4. Cache

Answer: c, Push down stack

Solution: In this case, the operands are implicitly loaded onto the ALU.

Q2. The addressing mode which makes use of in-direction pointers is ______.
  1. Indirect addressing mode
  2. Index addressing mode
  3. Relative addressing mode
  4. Offset addressing mode

Answer: a, Indirect addressing mode

Solution: In this addressing mode, the value of the register serves as another memory location and hence we use pointers to get the data.

Q3. The addressing mode/s, which uses the PC instead of a general purpose register is ______.
  1. Indexed with offset
  2. Relative
  3. Direct
  4. Both Indexed with offset and direct

Answer: b, Relative

Solution:

Relative addressing mode:
  • The effective address of the operand is obtained by adding a displacement (offset) to the Program Counter (PC).
  • It is commonly used for branch instructions.
Indexed with offset:
  • Uses a base register (like a general-purpose register) plus an offset. It does not use the PC.
Direct addressing:
  • The address of the operand is given directly in the instruction. No PC involvement.

Q4. When we use auto increment or auto decrements, which of the following is/are true?.
  1. In both, the address is used to retrieve the operand and then the address gets altered
  2. In auto increment, the operand is retrieved first and then the address altered
  3. Both of them can be used on general purpose registers as well as memory locations
  1. 1, 2, 3
  2. 2
  3. 1, 3
  4. 2, 3

Answer: d, 2, 3

Solution: In the case of, auto increment the increment is done afterward and in auto decrement the decrement is done first.

Note: In auto-increment, the operand is retrieved first, and then the address is altered. In auto-decrement, the address is altered first, and then the operand is retrieved using the new address. ​

Q5. _____ addressing mode is most suitable to change the normal sequence of execution of instructions..
  1. Relative
  2. Indirect
  3. Index with Offset
  4. Immediate

Answer: a, Relative

Solution: The relative addressing mode is used for this since it directly updates the PC.

Q6. The addressing mode, where you directly specify the operand value is _______.
  1. Immediate
  2. Direct
  3. Definite
  4. Relative

Answer: a, Immediate

Solution: Immediate addressing mode directly specifies the operand value.

Q7. The instruction, Add #45,R1 does _______.
  1. Adds the value of 45 to the address of R1 and stores 45 in that address
  2. Adds 45 to the value of R1 and stores it in R1
  3. Finds the memory location 45 and adds that content to that of R1
  4. None of the mentioned

Answer: b, Adds 45 to the value of R1 and stores it in R1

Solution: The instruction is using immediate addressing mode hence the value is stored in the location 45 is added.

Q8. Add #45, when this instruction is executed the following happen/s _______.
  1. The processor raises an error and requests for one more operand
  2. The value stored in memory location 45 is retrieved and one more operand is requested
  3. The value 45 gets added to the value on the stack and is pushed onto the stack
  4. None of the mentioned

Answer: b, The value stored in memory location 45 is retrieved and one more operand is requested

Solution: The value stored in memory location 45 is retrieved and one more operand is requested.

Q9. In the following indexed addressing mode instruction, MOV 5(R1), LOC the effective address is ______.
  1. EA = 5+R1
  2. EA = R1
  3. EA = [R1]
  4. EA = 5+[R1]

Answer: d, EA = 5+[R1]

Solution: This instruction is in Base with offset addressing mode.

Q10. The effective address of the following instruction is MUL 5(R1,R2)..
  1. 5+R1+R2
  2. 5+(R1*R2)
  3. 5+[R1]+[R2]
  4. 5*([R1]+[R2])

Answer: c, 5+[R1]+[R2]

Solution: The addressing mode used is base with offset and index.

Q11. Which of the following addressing modes are suitable for program relocation at run time?.
  1. Absolute addressing
  2. Base addressing
  3. Relative addressing
  4. Indirect addressing
  1. 1 and 4
  2. 1 and 2
  3. 2 and 3
  4. 1, 2 and 4

Answer: c, 2 and 3

Solution:

  1. Absolute addressing
  2. Base addressing
  3. Relative addressing
  4. Indirect addressing

Q12. What is the most appropriate match for the items in the first column with the items in the second column-.
COLUMN 1 COLUMN 2
X: Indirect addressing 1. Array implementation
Y: Indexed addressing 2. Writing relocatable code
Z: Base register addressing 3. Passing array as parameter
  1. X-3, Y-1, Z-2
  2. X-2, Y-3, Z-1
  3. X-3, Y-2, Z-1
  4. X-1, Y-3, Z-2

Answer: a, X-3, Y-1, Z-2

Solution:

 COLUMN 1 COLUMN 2
 X: Indirect addressing 1. Array implementation
 Y: Indexed addressing 2. Writing relocatable code
 Z: Base register addressing 3. Passing array as parameter

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Q13. Q3: The immediate addressing mode can be used for.
  1. Loading internal registers with initial values
  2. Perform arithmetic or logical operation on data contained in instructions
  1. Only 1
  2. Only 2
  3. Both 1 and 2
  4. Immediate mode refers to data in cache

Answer: c, Both 1 and 2

Solution:

  1. Loading internal registers with initial values
  2. Perform arithmetic or logical operation on data contained in instructions

Q14. The most appropriate matching for the following pairs:.
X. Indirect Addressing  i. Loop
Y. Immediate Addressing ii. Pointer
Z. Auto Decrement Addressing iii. Constants
  1. X-iii, Y-ii, Z-i
  2. X-ii, Y-iii, Z-i
  3. X-iii, Y-i, Z-ii
  4. X-ii, Y-i, Z-iii

Answer: b, X-ii, Y-iii, Z-i

Solution:

Q15. Zero address instruction are designed with implied addressing mode..
  1. TRUE
  2. FALSE
  3. Can be true or false
  4. Can not say

Answer: a, TRUE

Solution: Zero-address instructions are designed with implied addressing mode. Example: stack based operations.

Q16. An offset is determined by adding any combination of ________ address elements.
  1. 3
  2. 4
  3. 5
  4. 6

Answer: a, 3

Solution: Effective address or Offset is determined by adding any combination of three address elements: displacement, base and index.

Q17. In ________ the operand is specified in the instruction itself.
  1. Immediate addressing
  2. Register mode
  3. Implied addressing
  4. Register Indirect

Answer: c, Implied addressing

Solution: In implied addressing the operand is specified in the instruction itself.

Q18. In which mode the operand is placed in one of 8 bit or 16 bit general purpose registers?.
  1. Immediate addressing
  2. Register mode
  3. Implied addressing
  4. Register Indirect

Answer: b, Register mode

Solution: In register addressing the operand is placed in one of 8 bit or 16 bit general purpose registers.

Q19. Which of the following modes is the most relevant addressing mode to write position independent code?.
  1. Direct mode
  2. Indirect mode
  3. Relative mode
  4. Indexed mode

Answer: c, Relative mode

Q20. Which one of the following is used to read the control words sequentially from the control memory?.
  1. Microprogram address register
  2. Microprogram counter
  3. Control memory address register
  4. Program counter

Answer: a, Microprogram address register

Q21. Which of the following is NOT a valid addressing mode?.
  1. Register addressing
  2. Memory addressing
  3. Cache addressing
  4. Immediate addressing

Answer: c, Cache addressing

Q22. Which of the following stores operand during execution and result of operation after execution?.
  1. General purpose registers
  2. Stack register
  3. Flag register
  4. Accumulator

Answer: d, Accumulator

Q23. In 8085 microprocessor CMA, RLC, RRC instructions are examples of which addressing mode?.
  1. Implicit addressing mode
  2. Direct addressing mode
  3. Indirect addressing mode
  4. Immediate addressing mode

Answer: a, Implicit addressing mode

Q24. What is the addressing mode used in the instruction PUSH B?.
  1. Direct
  2. Register
  3. Register indirect
  4. Immediate

Answer: c, Register indirect

Q25. Relative mode of addressing is most relevant to writing.
  1. Co-routines
  2. Position-independent code
  3. Sharable code
  4. Interrupt Handlers

Answer: b, Position-independent code

Q26. Addressing mode in which the address field of instruction specifies a register in the CPU, whose contents given the address of the operand in memory is called.......
  1. indirect addressing mode
  2. relative addressing mode
  3. register addressing mode
  4. register indirect addressing mode

Answer: d, register indirect addressing mode